High-speed low-complexity elliptic curve cryptographic processor

In this paper, we present a novel modified algorithm and architecture to compute Elliptic Curve Cryptographic point multiplication. The proposed algorithm significantly reduces the number of point addition operations. Furthermore, the field multiplication operations are scheduled to perform simultaneously to reduce the latency. As a result, our algorithm and architecture reduce the hardware complexity compared to others, while the required time for point multiplication is kept at a reasonable value. The simulation result on Xilinx Virtex-7 FPGA shows that the proposed architecture offers an improvement in hardware complexity up to 68% and much better efficiency compared to others.