Design and verification of intra prediction hardware for video streaming in IoT systems

In this paper, we presents efficient hardware design of the slim model of HEVC intra prediction. Our intra prediction module do not use several techniques (TSM, RQT, prediction for 32 × 32 block) used in HM. And several techniques (RMD, RDO) are simplified for hardware design. Though the compression performance is decreased due to this simplification, it allows the hardware implementation of real-time encoder. Real-time Encoder is suitable for IoT because our encoder´s size is small and fast. Also the verification of the proposed intra prediction design is conducted. The proposed design was verified via FPGA.