A multi-functional floating point multiplier

This paper presents a multi-functional double precision floating-point multiplier design. The proposed design can perform one double precision multiplication or one vector multiplication of two 2D vectors which is consist of single precision floating-point numbers. The proposed design is modeled in Verilog-HDL and verified through extensive functional simulation. The presented multi-functional double-precision multiplier is compared with conventional single and double precision multipliers by ASIC synthesis. The functionality of supporting single precision multiplication is at the cost of 8% more area and 9% more delay, compared to a conventional double precision multiplier. Compared to the combination of one double and four single precision multipliers, the proposed design saves 47% area.