DocumentCode :
3746108
Title :
A 61 ?A/MHz reconfigurable application-specific processor and system-on-chip for Internet-of-Things
Author :
Yuxiang Huan;Ning Ma;Stefan Blixt;Zhuo Zou;Lirong Zheng
Author_Institution :
Fudan University, Shanghai, China
fYear :
2015
Firstpage :
235
Lastpage :
239
Abstract :
This paper presents a SoC design that combines general purpose control and application-specific acceleration within a reconfigurable ASIP core for Internet-of-Things applications. Sufficient processing capability and re-configurability are provided by highly customizable data path and efficient sequence control loop. By fully utilizing the data path of proposed architecture, the processor significantly reduces >4X code size and offers superior performance compared with MSP430 and Atmega128 in FIR and Whetstone benchmarks. More than 10X speedup can be obtained in executing encryption algorithms by optimized micro-instructions without extra hardware accelerators. Fabricated in 0.18 μm CMOS, our SoC´s energy efficiency beats most of the microcontrollers with a value as low as 61 μA/MHz.
Keywords :
"Energy efficiency","Random access memory","Computer architecture","Benchmark testing","Encryption","Hardware","Registers"
Publisher :
ieee
Conference_Titel :
System-on-Chip Conference (SOCC), 2015 28th IEEE International
Electronic_ISBN :
2164-1706
Type :
conf
DOI :
10.1109/SOCC.2015.7406954
Filename :
7406954
Link To Document :
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