High-PSR CMOS LDO with embedded ripple feedforward and energy-efficient bandwidth extension

A CMOS low-dropout regulator (LDO) with high power-supply ripple rejection (PSR) across a wide frequency range is presented and designed in 0.18-μm CMOS technology. Targeting for the application of energy-autonomous biomedical implants, it has a very simple structure and features low power consumption. The high PSR in low frequency range is realized by the proposed embedded supply ripple feed-forward technique. Moreover, the PSR bandwidth is improved up to several MHz by adopting an energy-efficient double zero compensation network. With a 4.7-μF ceramic output capacitor, in the maximum loading condition (i.e., 25 mA), the simulated PSR is no less than -86 dB from DC to 10 kHz, and better than -63 dB up to 10 MHz. The quiescent current is just 10 μA. The line and load regulations are 0.5 mV/V @ 25-mA loading and 0.14 mV/mA @ 1.3-V Vin, respectively. The overshoot and undershoot voltages are less than 2 mV when loading current changes between 0 and 25 mA.