• DocumentCode
    3747264
  • Title

    Effect of finger spacing on the gain of a silicon avalanche photodetector compatible with CMOS technology

  • Author

    Kanishka Majumder;Paulami Rakshit;N. R. Das

  • Author_Institution
    Academy of Technology, West Bengal University of Technology, G. T. Road, Adisaptagram, Aedconagar, Hooghly-712121, India
  • fYear
    2015
  • Firstpage
    1
  • Lastpage
    2
  • Abstract
    We present a theoretical study of the gain of a CMOS compatible thin submicron Si-CMOS p-i-n avalanche photodetector (APD) suitable for high-speed, low-voltage operation. A 2-D model is used to estimate the avalanche build-up of carriers in the depleted region considering the dead-space effect. The model is also considered the effects of diffusion of carriers from the substrate region. The results on the gain are shown as a function of finger spacing and bias.
  • Keywords
    "Silicon","CMOS integrated circuits","Fingers","Semiconductor device modeling","Photodetectors","Mathematical model","CMOS technology"
  • Publisher
    ieee
  • Conference_Titel
    Microwave and Photonics (ICMAP), 2015 International Conference on
  • Print_ISBN
    978-1-4673-6897-1
  • Type

    conf

  • DOI
    10.1109/ICMAP.2015.7408774
  • Filename
    7408774
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=3747264