Innovative high-speed data acquisition architecture

Author

Loureiro, Custódio F M ; Correia, Carlos M B A

Author_Institution

Dept. de Fisica, Coimbra Univ., Portugal

Volume

2

fYear

2000

fDate

2000

Abstract

This paper reports on the development of a new high speed modular data acquisition architecture, capable of covering the most demanding applications in what concerns sampling time and the combination of sampling time with memory per channel capability, along with sophisticated functionality for easy system integration. The modular architecture proposed also addresses directly the common problem of trigger generation and delivery by implementing a large (several tens of Mbytes), low cost, circular memory. This allows for a large delay in the delivery time of the trigger signal (up to tens of milliseconds while acquiring data at 1 GSPS) without incurring any data lost or dead time

Keywords

computer architecture; data acquisition; field programmable gate arrays; high energy physics instrumentation computing; FPGA; architecture; high-speed data acquisition; modular architecture; sampling time; trigger generation; Control systems; Costs; Data acquisition; Delay effects; Digital signal processing; Field programmable gate arrays; Hardware; Read-write memory; Real time systems; Sampling methods;

fLanguage

English

Publisher

ieee

Conference_Titel

Nuclear Science Symposium Conference Record, 2000 IEEE

Conference_Location

Lyon

ISSN

1082-3654

Print_ISBN

0-7803-6503-8

Type

conf

DOI

10.1109/NSSMIC.2000.949969

Filename

949969