Fundamental trade-off between short-channel control and hot carrier degradation in an extremely-thin silicon-on-insulator (ETSOI) technology

Extremely thin silicon-on-insulator (ETSOI) structure has been developed to improve gate control and to suppress the short-channel effect (SCE) associated with bulk MOSFET. However, since self-heating in ETSOI may compromise both performance and reliability, a careful analysis of the trade-off between short-channel control and self-heating is needed. In this paper, we (i) characterize channel and surface self-heating of a ETSOI technology as a function of channel thickness (T_si) and length (L_ch) using electrical and optical methods, respectively; (ii) theoretically interpret the trade-off between gate controllability and self-heating effects, (iii) correlate HCI degradation to the degree of self-heating, and (vi) find distinctive universality of HCI degradation (as a function of T_si and L_ch) that enables a long term reliability projection. We conclude that the trade-off between HCI and channel control suggests that thinnest channel may not be optimum; and that the universality of HCI degradation would hold only if self-heating is accounted for.