DocumentCode
3749282
Title
A comparative study of cache performance for embedded applications
Author
B. Shameedha Begum;N. Ramasubramanian
Author_Institution
Department of Computer Science and Engineering, National Institute of Technology, Tiruchirappalli, Tamil Nadu, India
fYear
2015
Firstpage
872
Lastpage
876
Abstract
In the context of the performance of characterized applications on embedded systems, knowledge of memory access pattern place a vital role. Real time embedded systems have memory moules which are normally a combination of data and instruction cache, DMA, scratch pad memory and custom memory. Parameters such as area, power, and performance dictate the performance of embedded applications. Design of the cache memory structure has large impact on performance and power consumption of embedded systems. A survey of recent techniques that have been used to improve the performance of embedded systems has been presented here with a focus on area and power.
Keywords
"Random access memory","Embedded systems","Memory management","Hardware","Cache memory","Energy consumption","Electronic countermeasures"
Publisher
ieee
Conference_Titel
Computing and Network Communications (CoCoNet), 2015 International Conference on
Type
conf
DOI
10.1109/CoCoNet.2015.7411292
Filename
7411292
Link To Document