DocumentCode
3749502
Title
Influence of processing conditions on breakdown and charge build-up in thin siO2 gate dielectrics
Author
M.W. Hillen;I.S. Darakchiev;R.F. De Keersmaecker
Author_Institution
ESAT laboratory, Katholieke Universiteit Leuven, Kardinaal Mercierlaan 94, B-3030 Heverlee, Belgium
fYear
1983
fDate
7/1/1983 12:00:00 AM
Firstpage
443
Lastpage
447
Abstract
SiO2 layers on Si with extremely low defect densities have been grown in a double-walled oxidation tube. The use of a chlorinated gas in the outer tube, the increase of 02 flow in the inner tube and the use of polysilicon electrodes all improve the maximum breakdown fields.
Keywords
"Electron traps","Logic gates","Silicon","Voltage measurement","Annealing","Magnetomechanical effects","Lithography"
Publisher
ieee
Conference_Titel
Conduction and Breakdown in Solid Dielectrics, Proceedings of First International Conference on
Type
conf
DOI
10.1109/ICSD.1983.7411555
Filename
7411555
Link To Document