DocumentCode :
3749890
Title :
Planarization improvement using non-porous polishing pad in ILD CMP
Author :
Che-Chin Yang; Kai En Lin; Wei-Nan Fang; Jian-Shiun Chen; Yi-Ching Wu; Yung-Chieh Kuo; Hung-Bo Lu
Author_Institution :
United Microelectronics Corp. 12A_FAB Division Thin Film Module. No 18, 20, Nanke 2nd Rd. Tainan Science Park, Taiwan, R.O.C.
fYear :
2015
Firstpage :
1
Lastpage :
3
Abstract :
CMP polishing pads play a critical role in obtaining highly consistent and reliable Chemical Mechanical Planarization (CMP) process results. Optimal planarization of the process layers is a critical objective for the fabrication process and is mainly enabled via Chemical-Mechanical Polishing (CMP) techniques. In order to get the golden planarization, to understand and collect different pad´s polish data will be meaningful. Some chemical mechanical polishing pads and tested system and a method for using such different pad are described. For topography issue, we use “big data” to explain the polish variation between pad and pattern wafer. In this paper, an experimental approach with polish data will be suggested. The key study was to collect topography variation during pattern wafer polishing. At the same time, removal rate and polish profile and defect also were concerned. According to the experiment result and pad characteristic analysis, the optimum polish mode will be appeared easily. At the same time, the results also showed ILD CMP topography will be influenced by pad porosity, hardness and deflection.
Keywords :
"Semiconductor device modeling","Semiconductor device reliability","Polymers"
Publisher :
ieee
Conference_Titel :
Planarization/CMP Technology (ICPT), 2015 International Conference on
Type :
conf
Filename :
7411988
Link To Document :
بازگشت