DocumentCode
3750224
Title
Study of barrier layer thickness effect for the micro-bump
Author
H.Y. Li;Norhanani Binte Jaafar;Mohamad Iskandar B Es Sam;Kalyn Lim Tien Shee;Wong Lai Yin;Chui King Jien
Author_Institution
Institute of Microelectronics, 11 Science Park Road, A?STAR (Agency for Science, Technology and Research), Singapore, 117685
fYear
2015
Firstpage
1
Lastpage
6
Abstract
With the semiconductor development, more and more different devices need be integrated to achieve faster and more functionalities. Micro-bump is an important connection from chip to chip, chip to wafer and chip to substrate. We evaluated micro-bump barrier layer Ti thicknesses (400Å, 1KÅ and 2KÅ) effect on shear strength and bump chain resistance in this study.
Keywords
"Metals","Substrates","Silicon","Fabrication","Resistance","Dielectrics","Silicon compounds"
Publisher
ieee
Conference_Titel
Electronics Packaging and Technology Conference (EPTC), 2015 IEEE 17th
Type
conf
DOI
10.1109/EPTC.2015.7412328
Filename
7412328
Link To Document