Validation of new approach of modelling traces by mapping mechanical properties for a printed circuit board mechanical analysis

Printed circuit boards (PCB) are found in almost all electronic devices. During manufacturing and field operation, these PCBs are subjected to different loads, which cause stresses and deformations. Excessive stresses and deformations of PCB can lead to system failure. Thermo mechanical simulation helps to predict stress distribution in manufacturing and operational condition. PCB object consists of alternate layers of metal and dielectrics, within each metal layer current is carried by several segments of copper traces and passed to other layers by vias. Modelling these traces and vias is very important for accurate stress calculations on a PCB object. As modern PCBs have several trace segments and vias, modelling each trace and via geometry explicitly is computationally costly. On the other hand, a simplest approach will be assuming uniform lumped values of mechanical properties for the complete PCB but this lumped approach would decrease the accuracy of stress predictions. The new modelling approach presented in this paper considers the effect of traces and vias by locally mapping mechanical properties into each of FEA elements of PCB. Thus eliminates the need to model trace and via geometry explicitly. In this paper, Trace mapping model has been used to predict the stress distribution between solder joints and PCB in a reflow oven during reflow process. Analysis was also done with detailed modelling of trace and via geometry and lumped modelling of PCB. All three approaches of modelling PCB, detailed, lumped and new trace mapping methods are compared.