Title :
Energy reduction from using selective precharge in two different logic arrays
Author :
Wang, Shao-Yi ; Zukowski, Charles A.
Author_Institution :
Dept. of Electr. Eng., Columbia Univ., New York, NY, USA
Abstract :
Selective precharge is a low-power circuit technique that can significantly reduce the average energy use in large fan-in logic arrays. In this paper, we investigate application of this technique to two specific real examples; a content addressable memory (CAM) used in a routing table and a programmable logic array (PLA) used for table-lookup function evaluation. We show that significant energy savings is possible, and we discuss the impact of various array characteristics
Keywords :
content-addressable storage; energy conservation; probability; programmable logic arrays; table lookup; PLA; content addressable memory; energy savings; fan-in logic arrays; low-power circuit; programmable logic array; routing table; selective precharge; table-lookup; Associative memory; CADCAM; Computer aided manufacturing; Energy consumption; Logic arrays; Logic circuits; Logic gates; Programmable logic arrays; Routing; Switches;
Conference_Titel :
Circuits and Systems, 2000. Proceedings of the 43rd IEEE Midwest Symposium on
Conference_Location :
Lansing, MI
Print_ISBN :
0-7803-6475-9
DOI :
10.1109/MWSCAS.2000.951592
