DocumentCode
375064
Title
A (204,188) Reed-Solomon decoder using decomposed Euclidean algorithm
Author
Chang, Hsie-Chia ; Chih-Yu Chen ; Tsai, Shu-Hui ; Chen-Yi Lee
Author_Institution
Dept. of Electron. Eng., Nat. Chiao Tung Univ., Hsinchu, Taiwan
Volume
1
fYear
2000
fDate
2000
Firstpage
262
Abstract
A (204, 188) Reed-Solomon decoder for DVB application is presented. The RS decoder features an area-efficient key equation solver using a novel decomposed Euclidean algorithm. We implement the RS decoder using 0.35μm CMOS IP4M standard cells, where the total gate count is about 16K~17K. Test results show that the RS decoder chip can run up to 87MHz
Keywords
CMOS digital integrated circuits; Reed-Solomon codes; decoding; digital video broadcasting; (204,188) Reed-Solomon decoder; 0.35 micron; 87 MHz; CMOS IP4M standard cells; DVB application; area-efficient key equation solver; decomposed Euclidean algorithm; total gate count; Decoding; Digital video broadcasting; Equations; Error correction; Error correction codes; Flowcharts; Galois fields; Polynomials; Reed-Solomon codes; Testing;
fLanguage
English
Publisher
ieee
Conference_Titel
Circuits and Systems, 2000. Proceedings of the 43rd IEEE Midwest Symposium on
Conference_Location
Lansing, MI
Print_ISBN
0-7803-6475-9
Type
conf
DOI
10.1109/MWSCAS.2000.951634
Filename
951634
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