Title :
A low-power cache system for embedded processors
Author :
Park, Gi-Ho ; Lee, Kil-Wan ; Lee, Jang-Soo ; Han, Tack-Don ; Kim, Shin-Dug ; Kim, Yong-Chun ; Jeong, Seh-Woong ; Lee, Kwang-Yup
Author_Institution :
Res. Inst. of ASIC Design, Yonsei Univ., Seoul, South Korea
Abstract :
A low-power cache structure for embedded processors, called a cooperative cache system, is presented in this paper. The cooperative cache system reduces power consumption of the cache system by virtue of the structural characteristics that consists of two separate caches having different associativities and block sizes. The cooperative cache system is adopted as the cache structure for the CalmRISC-32 embedded processor, the prototype chip of which was recently manufactured with a 0.25 μm, 4-metal process by Samsung Electronics Co
Keywords :
cache storage; embedded systems; low-power electronics; microprocessor chips; semiconductor storage; 0.25 micron; CabnRISC-32 processor; Samsung Electronics; associativities; block sizes; cooperative cache system; embedded processors; low-power cache structure; power consumption reduction; Application specific integrated circuits; Computer science; Cooperative caching; Design engineering; Embedded computing; Energy consumption; Large scale integration; Manufacturing processes; Power engineering and energy; Power engineering computing;
Conference_Titel :
Circuits and Systems, 2000. Proceedings of the 43rd IEEE Midwest Symposium on
Conference_Location :
Lansing, MI
Print_ISBN :
0-7803-6475-9
DOI :
10.1109/MWSCAS.2000.951650
