• DocumentCode
    375079
  • Title

    Specification and formal verification of interconnect bus protocols

  • Author

    Ivanov, Lubomir ; Nunna, Ramakrishna

  • Author_Institution
    Dept. of Comput. Sci., Iona Coll., New Rochelle, NY, USA
  • Volume
    1
  • fYear
    2000
  • fDate
    2000
  • Firstpage
    378
  • Abstract
    In this paper, we apply a formal verification framework based on partial orders to verify the timing behaviors of communication/interconnect protocols such as Handshaking and PCI. Our methodology aims to reduce the high complexity of the algorithms incorporated in first-generation verification tools
  • Keywords
    formal verification; peripheral interfaces; protocols; system buses; PCI protocol; formal verification framework; handshaking protocol; interconnect bus protocols; partial orders; timing behaviors; Circuit simulation; Computer science; Design methodology; Educational institutions; Formal verification; Integrated circuit interconnections; Polynomials; Protocols; Testing; Timing;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Circuits and Systems, 2000. Proceedings of the 43rd IEEE Midwest Symposium on
  • Conference_Location
    Lansing, MI
  • Print_ISBN
    0-7803-6475-9
  • Type

    conf

  • DOI
    10.1109/MWSCAS.2000.951664
  • Filename
    951664
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=375079