A FPGA Power Estimation Method Based on an Improved BP Neural Network

Programmable logic device FPGA has characteristics of flexible design, high efficiency design, short development cycle and low cost. The power of FPGA is divided into static power and dynamic power. The static power is mainly decided by the temperature, it is easy to get power by building a simple model. But the dynamic power is decided by many kinds of design resources. This article focuses on XC4VSX55 FPGA chip and studies the process of its power model, especially proposes a BP neural network algorithm combines adaptive learning rate algorithm with Levenberg-Marquardt. Specific implementation is as follows, firstly, gets the sample data provided by XPower Estimator, then trains the sample data by BP neural network, and estimates the intrinsic links through the weights and thresholds of network, finally, obtains the power model. This article provides a power model, and the improved BP network algorithm not only ensures the accuracy of the training results, but also improves the convergence speed.