Low Complexity Hybrid ARQ Using Extended Turbo Product Codes Self-Detection

This paper presents a hybrid automatic repeat request (HARQ) system using a parity error checking (PEC) technique with low processing power requirements. The proposed technique is applied to extended turbo product codes (TPC) where the parity check bits used for extending the component codes of TPC, are exploited to replace the conventional cyclic redundancy check (CRC) error detection in HARQ systems. Consequently, the required processing power can be reduced substantially while the throughput is almost unchanged for long TPC codes, or increased for short TPC codes. The proposed PEC technique is also compared to the state-of-the-art syndrome error checking (SEC) as well as conventional CRC. Monte Carlo simulation results reveal that PEC- HARQ can provide equivalent throughput to SEC-HARQ and higher throughput than CR-HARQ systems. Moreover, numerical results show that the PEC technique has lower computational complexity than both SEC and CRC error detection. In particular cases, the complexity of the proposed system is reduced by more than 50% as compared to the state- of-the-art, and by more than 80% when compared to the CRC error detection.