Title :
Exploiting Padding Bits for Improvement of Channel Decoder Performance
Author :
Yoshito Watanabe;Hideki Ochiai
Author_Institution :
Dept. of Electr. &
Abstract :
In most practical communication systems where the source encoder is followed by the channel encoder, there is some mismatch between the length of the bits from the source encoder and that fed into the channel encoder. Therefore, dummy bits are usually padded to the source coded bits so as to fill the gap, and these padded bits are usually discarded after channel decoding at the receiver. In this paper, considering the padding event at the transmitter side as a probabilistic event, a novel integrated decoder that detects the zero padding (ZP) sequence together with the trellis pruning technique is proposed assuming that the turbo code is used as a channel code. The performance depends on how these padded bits are allocated in the information sequences, and two representative approaches, referred to as consecutive zero padding (CZP) and sparse zero insertion (SZI), are introduced. Through the EXIT chart analysis, it is shown that the latter approach results in considerably better performance than the former due to the effect of trellis pruning. Furthermore, simulation results show that the proposed decoder can improve the throughput of the system in comparison with the conventional system where the padding bits simply reduce the effective throughput.
Keywords :
"Decoding","Transmitters","Turbo codes","Binary phase shift keying","Receivers"
Conference_Titel :
Global Communications Conference (GLOBECOM), 2015 IEEE
DOI :
10.1109/GLOCOM.2015.7417722