DocumentCode :
375409
Title :
A multiple context reconfigurable functional unit
Author :
Miller, Michael C. ; Tabak, Daniel
Author_Institution :
Dept. of Electr. & Comput. Eng., George Mason Univ., Fairfax, VA, USA
fYear :
2001
fDate :
2001
Firstpage :
446
Lastpage :
452
Abstract :
A design for a reconfigurable functional unit, based on dynamically programmable gate arrays, is proposed. The design provides multiple concurrent configuration contexts for the purpose of supporting multiple execution streams. A discussion of the impact of the reconfigurable functional unit on each processor pipeline stage is presented. The proposed design is simulated and the system performance is compared to other designs
Keywords :
multi-threading; pipeline processing; programmable logic arrays; reconfigurable architectures; dynamically programmable gate arrays; multiple concurrent configuration contexts; multiple context reconfigurable functional unit; multiple execution streams; processor pipeline stage; Application specific integrated circuits; Detectors; Electronic mail; Field programmable gate arrays; Pipelines; Programmable logic arrays; Reconfigurable logic; Registers; Table lookup; Yarn;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Digital Systems Design, 2001. Proceedings. Euromicro Symposium on
Conference_Location :
Warsaw
Print_ISBN :
0-7695-1239-9
Type :
conf
DOI :
10.1109/DSD.2001.952364
Filename :
952364
Link To Document :
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