Title :
GPU acceleration of the HEVC decoder inter prediction module
Author :
Diego F. de Souza;Aleksandar Ilic;Nuno Roma;Leonel Sousa
Author_Institution :
INESC-ID, IST, Universidade de Lisboa, Rua Alves Redol 9, 1000-029, Lisbon, Portugal
Abstract :
The inter prediction decoding is one of the most time consuming modules in modern video decoders, which may significantly limit their real-time capabilities. To circumvent this issue, an efficient acceleration of the HEVC inter prediction decoding module is proposed, by offloading the involved workload to GPU devices. The proposed approach aims at efficiently exploiting the GPU resources by carefully managing the processing within the computational kernels, as well as by optimizing the usage of the complex GPU memory hierarchy. The obtained experimental results show that real-time video decoding is achieved for all tested Ultra HD 4K, WQXGA and Full HD video sequences, even when considering the most demanding encoding parameterizations, delivering average processing times up to 20.39 ms, 9.01 ms and 5.22 ms, respectively.
Keywords :
"Graphics processing units","Decoding","Interpolation","Filtering","Instruction sets","Standards","Central Processing Unit"
Conference_Titel :
Signal and Information Processing (GlobalSIP), 2015 IEEE Global Conference on
DOI :
10.1109/GlobalSIP.2015.7418397