• DocumentCode
    3754264
  • Title

    HSA-enabled DSPs and accelerators

  • Author

    John Glossner;Paul Blinzer;Jarmo Takala

  • Author_Institution
    General Processor Technologies Inc., Tarrytown, NY, USA
  • fYear
    2015
  • Firstpage
    1407
  • Lastpage
    1411
  • Abstract
    In this paper, we describe the Heterogeneous System Architecture Foundation´s application to digital signal processors (DSP) and hardware accelerators. We provide an overview of the HSA runtime, system architecture and programmer´s model, identify characteristics of DSPs and compare differences in algorithms to GPUs. We show an example mapping of HSA agents to a modern DSP using the HSA intermediate language.
  • Keywords
    "Digital signal processing","Kernel","Graphics processing units","Hardware","Registers","Runtime","Parallel processing"
  • Publisher
    ieee
  • Conference_Titel
    Signal and Information Processing (GlobalSIP), 2015 IEEE Global Conference on
  • Type

    conf

  • DOI
    10.1109/GlobalSIP.2015.7418430
  • Filename
    7418430
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=3754264