Sorting algorithm for a pd modulation for a cascaded multilevel converter

This paper proposes a simple phase disposition modulation with sorting algorithm for three-phase cascaded multilevel converters. The sorting algorithm can be implemented entirely in software. The main features of the proposed modulation is a better distribution of PWM pulses, switching losses and DC bus current when compared with the conventional phase disposition (PD) modulation. In addition, it results in the nearest level PWM in the line-to-line output voltages leading to a smaller THD if compared with phase-shifted (PS) modulation. Simulation results are presented to demonstrate the good performance of the proposed algorithm.