DocumentCode :
375543
Title :
Optimizing BDD-based verification analysing variable dependencies
Author :
Déharbe, David ; Vidal, Jorgiano Márcio Bruno
fYear :
2001
fDate :
2001
Firstpage :
64
Lastpage :
69
Abstract :
Automatic verification of sequential designs has been made possible by the use of efficient representations for propositional logic such as Binary Decision Diagrams (BDDs). However, the efficient use of BDDs is only, possible provided a good ordering of the state variables of the design. This paper presents a novel heuristics, called variable weighting, that provides an initial variable ordering for sequential designs. Experiments are provided to illustrate the quality of this algorithm. An important result is that it combines extremely, well with existing dynamic variable reordering techniques. In all experiments, the combination of variable weighting and reordering outperforms reordering alone
Keywords :
binary decision diagrams; formal verification; logic design; sequential circuits; BDD variable ordering; BDD-based verification optimisation; automatic verification; binary decision diagrams; initial variable ordering; sequential designs; state variables; variable reordering techniques; variable weighting; Automatic logic units; Binary decision diagrams; Boolean functions; Circuit testing; Combinational circuits; Data structures; Logic circuits; Logic design; Logic testing; Sequential circuits;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Integrated Circuits and Systems Design, 2001, 14th Symposium on.
Conference_Location :
Pirenopolis
Print_ISBN :
0-7695-1333-6
Type :
conf
DOI :
10.1109/SBCCI.2001.953005
Filename :
953005
Link To Document :
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