The Transformation and Optimization in IR2VHDL

Reconfigurable computing technology can be used to improve the parallelism of computing. The reconfigurable compiler can be implemented to support the system´s parallelism and flexibility without redesigning original program. The IR2VHDL (VHSIC Hardware Description Language) is one of the core components of the reconfigurable compiler. In this paper, we deploy IR2VHDL to LLVM (Low Level Virtual Machine) - IR (Intermediate Representation) in order to achieve hardware-oriented optimization for improving system parallelism and robustness. The deployment is very useful when LLVM-IR is transformed. Finally, taking bubble sort program as a test-bed, the process of transformation and optimization are tested to study eh applicability and feasibility of IR2VHDL.