• DocumentCode
    375716
  • Title

    Q-enhancement of spiral inductor with N/sup +/-diffusion patterned ground shields

  • Author

    Chen, Y.E. ; Bien, D. ; Heo, D. ; Laskar, J.

  • Author_Institution
    Microelectron. Res. Center, Georgia Inst. of Technol., Atlanta, GA, USA
  • Volume
    2
  • fYear
    2001
  • fDate
    20-24 May 2001
  • Firstpage
    1289
  • Abstract
    This paper discusses the quality factor enhancement by employing different patterned ground shields underneath the simple spiral inductor in a commercial BiCMOS technology. The effectiveness of the patterned ground shield technique depends heavily on the counter-effects between the reduction of substrate loss and the increase of parasitic capacitance. With proper choice of the shielding layer, the quality factor can achieve 21% enhancement for a 5-nH spiral inductor. The n/sup +/-diffusion layer is found to be the most effective layer for the patterned ground shield technique due to less associated parasitic capacitance.
  • Keywords
    BiCMOS analogue integrated circuits; Q-factor; UHF integrated circuits; electromagnetic shielding; inductors; RFIC; commercial BiCMOS technology; equivalent circuit; inductor model; n/sup +/-diffusion layer; on-chip inductors; parasitic capacitance increase; patterned ground shields; quality factor enhancement; spiral inductor; substrate loss reduction; BiCMOS integrated circuits; Capacitors; Degradation; Inductance; Inductors; Q factor; Radio frequency; Reflection; Resistors; Spirals;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Microwave Symposium Digest, 2001 IEEE MTT-S International
  • Conference_Location
    Phoenix, AZ, USA
  • ISSN
    0149-645X
  • Print_ISBN
    0-7803-6538-0
  • Type

    conf

  • DOI
    10.1109/MWSYM.2001.967129
  • Filename
    967129