A redundant matrix based cyclic encoder for ultra-high speed optical transport systems

A redundant matrix based cyclic encoder for ultra-high speed optical transport systems is proposed in this paper. It can eliminate the large fan-out effect of some XOR gates effectively and keep up with the data transmission speed in the application of ultra-high speed optical communication systems, such as 100Gpbs DP-QPSK or even 400Gpbs DP-QAM modulation optical transport systems. Furthermore, we also put forward a simple and fast algorithm to calculate the redundant matrix from generator polynomial and a detailed derivation of the algorithm is given in this paper. With the test of simulation on the platform of FPGA, the redundant matrix based architecture can eliminate the fan-out bottleneck effectively and meet the output bandwidth requirements and real-time constraints in the 100Gbps DP-QPSK optical transport systems. This new architecture is superior time saving percentage over traditional Linear Feedback Shift Register (LFSR) and CRT-based cyclic encoder. The speed of each single encoder for BCH(2047,1937) can be up to 12.5Gpbs at the clock of 200MHz which achieved the goal of output 100Gbps DP-QPSK modulation bandwidth by eight parallel cyclic encoders with only one redundant matrix table.