Bank Partitioning Based Adaptive Page Policy in Multi-core Memory Systems

With DRAM memory systems power consumption growing and performance declining, memory system optimization is imperative. At present most studies focus on reducing power consumption or improving performance of DRAM chips, but rarely do both. In this paper, we propose the bank partitioning based adaptive page policy to optimize both performance and power efficiency of DRAM chips, while at the same time reduce the inter-thread interference. First, we use bank partitioning to isolate memory streams of different threads. Second, we put forward an adaptive page policy to dynamically allocate the optimal page policy for each bank. Experimental results show that our scheme improves the system performance by 20.4% on average (up to 55%) and reduces DRAM power by 8% on average (up to 29%) for all workloads.