• DocumentCode
    3759373
  • Title

    Design of Ethernet to Optical Fiber Bridge IP Core Based on SOPC

  • Author

    Yongjun Zhang;Xiangxing Kong

  • Author_Institution
    Inst. Of Inf. Photonics &
  • fYear
    2015
  • Firstpage
    252
  • Lastpage
    255
  • Abstract
    Based on the technology of system on a programmable chip (SOPC), an Ethernet to fiber bridge IP core is developed and implemented in Xilinx FPGAs. The IP core provides a way to interconnect between Ethernet port and optical port, which can be used to address the needs of remote connection and break the transmission distance restriction of cable. The logic design of IP core is done in Xilinx development tools ISE, and then encapsulated into custom IP core in EDK tools, so that the user-defined IP core can be used in embedded system. Build SOPC system with Micro blaze soft-core processor, and add the IP cores into processor platform through Axi4-Stream bus interface. By testing and validating, the results show that Ethernet to optical fiber bridge IP core fulfills the purpose to transmit Ethernet data on optical fiber.
  • Keywords
    "IP networks","Monitoring","Field programmable gate arrays","Clocks","Optical fibers","Protocols","Optical fiber communication"
  • Publisher
    ieee
  • Conference_Titel
    Distributed Computing and Applications for Business Engineering and Science (DCABES), 2015 14th International Symposium on
  • Type

    conf

  • DOI
    10.1109/DCABES.2015.70
  • Filename
    7429604