MARC: A fast current-readout CMOS front-end for n-substrate, fully-depleted scientific CCDs

This work presents the development of a front-end integrated circuit (IC) targeting the readout of scientific Charge-Coupled Devices (CCDs) for a wide range of applications in the field of X-ray imaging. The reference detector considered is a high-performance 20×480, back-illuminated, n-substrate, fully-depleted CCD developed at the Lawrence Berkeley National Laboratory (LBNL) MicroSystems Lab. The innovation of MARC (Millisecond ASIC for the Readout of CCDs) is to implement a current readout of the CCD, thus overcoming speed limitations of the most common voltage readout source-follower configurations related to the settling of capacitive nodes. By means of the switched-current technique the IC implements a trapezoidal weighting function. The front-end comprises a programmable bias current generator for the CCD output p-MOSFET and the cascade of an integrator and a subtractor stage for the correlated double sampling. MARC also integrates a programmable digital sequencer to drive the switches of the filter. Measurement results show excellent linearity with a maximum error of 0.3 %, an almost ideal weighting function while the simulated ENC is equal to 2.6 hrms+ at an equivalent speed of 200 fps and 9.1 hrms+ at 400 fps. The first prototype of MARC is implemented in a standard CMOS 0.13 μm 1.2 V technology. Design challenges, simulation and preliminary measurement results are presented.