DocumentCode
3761342
Title
Mitigating the Dark Silicon Phenomenon on Next-Generation Network Processor Architectures
Author
Sourav Roy
fYear
2015
Firstpage
124
Lastpage
124
Abstract
This paper discusses three architectural techniques to mitigate the problem of power consumption as well as dark silicon on NPUs: heterogeneous multi-core architectures, hardware acceleration for common functions, and asymmetric scaling.
Keywords
"Silicon","Power demand","Multicore processing","Hardware","Acceleration","Next generation networking"
Publisher
ieee
Conference_Titel
Nanoelectronic and Information Systems (iNIS), 2015 IEEE International Symposium on
Type
conf
DOI
10.1109/iNIS.2015.21
Filename
7434410
Link To Document