Generalized Optimum Reversible Circuit Synthesis: A Memetic Approach

With the advent of technological advancement in CMOS, device size scales down to DSM (deep sub-micron) regime. Proceeding further faces the hindrance of failure of classical laws of physics. Reversible circuits have appeared as a plausible replacing candidate with the promise of lesser energy and power dissipation evolved from the assurance of lossless information. In this work, we have used the memetic approach to uniquely map the output to input specifications with precision besides optimizing gate costs. It has ensured generalized success by decreasing costs of all circuits in comparison to the state-of-the-art viz. MOSAIC, PPRM, SA based QM with ACO.