Title :
Accuracy Configurable Modified Booth Multiplier Using Approximate Adders
Author :
Babu M. Pranay;Srivatsava Jandhyala
Author_Institution :
Center for VLSI &
Abstract :
High speed multipliers are an essential component for real time multimedia applications. Majority of these applications can tolerate some amount of error in output of the multiplier and error permissible can dynamically vary within an application. This paper presents architecture for an accuracy configurable modified Booth multiplier (ACMBM) using approximate adders, whose error can be configured during the run time. Using two popular approximate adders published in the literature, a comparative study for the proposed multiplier is performed, in terms of delay, power, pass rate and normalized mean error distance (NMED). When compared to the conventional modified Booth multiplier, the proposed ACMBM, using type-I approximate adder configured for a 6-bit precision has a delay improvement of 15.3% for a decrease of 5% in power while using type-II approximate adder with no error correction, a delay improvement of 15.8% is achieved for an increase of 2% power respectively. A JPEG conversion application is implemented using the proposed ACMBM and the performance of the proposed multiplier with the two types of approximate adders is presented. Configurable accuracy during run time for signed multiplication, resulting in improvement in speed and power, makes the proposed ACMBM attractive for error-resilient real-time and IOT applications.
Keywords :
"Adders","Delays","Computer architecture","Error correction","Transform coding","Very large scale integration","Real-time systems"
Conference_Titel :
Nanoelectronic and Information Systems (iNIS), 2015 IEEE International Symposium on
DOI :
10.1109/iNIS.2015.50