Deterministic approach for bridging fault detection in Peres-Fredkin and Toffoli based reversible circuits

Reversible logic has wide applications in the field of quantum computing, low-power design, nanotechnology, optical information processing, bioinformatics etc. Due to the reversible nature of the circuit, it is conventionally easy to test the reversible circuit compared to irreversible circuit but with its own complexity. Various fault models are defined in the literature for reversible circuit. In this paper, we propose a deterministic ATPG algorithm to generate complete test-set for intra-level single and multiple bridging faults in a reversible circuit designed with family of Toffoli, Peres and Fredkin gates. The analysis of results shows that the proposed algorithm has 100% fault coverage and reduction of test set of average of 40% compared to existing approaches in literature.