• DocumentCode
    3762382
  • Title

    Combined Vramp and TDDB analysis for gate oxide reliability assessment and screening

  • Author

    T.E. Kopley;M. Ring;C. Choi;J. Colbath

  • Author_Institution
    San Jose, CA USA 95134
  • fYear
    2015
  • Firstpage
    138
  • Lastpage
    142
  • Abstract
    We present a gate oxide breakdown analysis method that uses an effective oxide thickness model combined with Time-Dependent Dielectric Breakdown (TDDB) model parameters to assess the reliability of extrinsic gate oxide defects. The method transforms gate breakdown voltage (Vbd), obtained from voltage ramp-to-breakdown measurements, into effective oxide thickness (teff) and compares these to the minimum oxide thickness that gives 10 or 20 years TDDB lifetimes. The analysis allows binning of extrinsic defects (Jedec mode B) into reliable and unreliable populations. It also gives an optimal gate screen voltage that can be used at wafer sort to screen parts with unreliable gate oxides. This method is valid for any CMOS process, but is especially useful for BCDMOS and Power Trench MOSFET technologies that use very large devices and ship in large volumes.
  • Keywords
    "Logic gates","Reliability","Sociology","Statistics","Electric breakdown","MOSFET","Capacitors"
  • Publisher
    ieee
  • Conference_Titel
    Integrated Reliability Workshop (IIRW), 2015 IEEE International
  • Print_ISBN
    978-1-4673-7395-1
  • Electronic_ISBN
    2374-8036
  • Type

    conf

  • DOI
    10.1109/IIRW.2015.7437087
  • Filename
    7437087