Low-power CMOS Variable Gain Amplifier design in 0.18?m process

This paper presents a low-power Variable Gain Amplifier (VGA) design in TSMC 0.18μm process. The proposed circuit is composed of tow transimpedance amplifiers and a transconductance amplifier. The VGA control is ensured by using the source degeneration R_S with the feedback resistor R_f. The proposed circuit is designed for low power, low noise and high bandwidth. The studied circuit provides a minimum and a maximum gain of respectively -33 dB and 25.6 dB over more than 133MHz bandwidth. The simulation structure provides less than 20 dB of noise figure (NF). The VGA consumes approximately 40μW under 1V power supply.