Direct-Elevator: A modified routing algorithm for 3D-NoCs

In this paper, a Three-Dimensional (3D) flexible routing algorithm is proposed for generic 3D Network-on-Chip (NoC). The proposed approach, Direct-Elevator, is based on the Elevator-First Algorithm which is independent of the network topology, number of interconnects and placement of interconnects. Direct-Elevator is tailored for 3D-NoC structures, offering a lower communication latency than its predecessor. The proposed approach paves the route for finding the optimal configuration of 3D network topology and different hard and soft router implementations for 3D-NoC based Field Programmable Gate Arrays (FPGA).