DocumentCode
3763792
Title
An alternative to CMOS stacks based on a floating-gate transistor
Author
Sherif M. Sharroush
Author_Institution
Dept. of Electrical Engineering, Fac. of Engineering, Port Said Univ., Port Said, Egypt
fYear
2015
Firstpage
109
Lastpage
112
Abstract
Complementary metal-oxide semiconductor (CMOS) circuits with wide fan in certainly suffers from the relatively slow response due to the N-channel (NMOS) or P-channel (PMOS) stack. In this paper, a novel circuit that acts as an alternative to CMOS stacks will be presented. The proposed scheme is based on using a voltage divider that has a variable resistor as one of its two resistors. This variable resistor is nothing but a floating-gate MOS transistor (FGMOS) whose control gates are connected to the inputs. The proposed scheme will be simulated using the 45 nm CMOS technology with a power-supply voltage of 1 V. The proposed scheme shows an average time-delay saving when the number of the inputs exceeds 4 and an energy-delay product saving when the number of the inputs exceeds 7.
Keywords
"Logic gates","Propagation delay","MOSFET","CMOS integrated circuits","Threshold voltage"
Publisher
ieee
Conference_Titel
Electronics, Circuits, and Systems (ICECS), 2015 IEEE International Conference on
Type
conf
DOI
10.1109/ICECS.2015.7440261
Filename
7440261
Link To Document