DocumentCode
3763798
Title
Bulk and FDSOI Sub-micron CMOS transistors resilience to single-event transients
Author
Walter Calienes Bartra;Andrei Vladimirescu;Ricardo Reis
Author_Institution
Universidade Federal do Rio Grande do Sul, PGMicro - Instituto de Inform?tica, Porto Alegre, RS - Brazil
fYear
2015
Firstpage
133
Lastpage
136
Abstract
This work presents a comparison of resilience between a 32nm Bulk and a 28nm Fully-Depleted Silicon On Insulator (FDSOI) transistor to heavy ion impacts on the Drain region. The impacts were performed in different transistor locations at different impact angles whereas previous works considered the impact just at a 0 degree angle. This comparison is performed with the device in the off-state using 2D TCAD simulations. The results show a 7.7 times improved resilience of the FDSOI transistor compared to that of Bulk MOSFET.
Keywords
"Transistors","Transient analysis","Logic gates","Silicon","Doping","Integrated circuit modeling","Substrates"
Publisher
ieee
Conference_Titel
Electronics, Circuits, and Systems (ICECS), 2015 IEEE International Conference on
Type
conf
DOI
10.1109/ICECS.2015.7440267
Filename
7440267
Link To Document