DocumentCode
3763848
Title
Fast signed-digit arithmetic circuits for residue number systems
Author
Shugang Wei
Author_Institution
Department of Mechanical Science and Technology, Gunma University, 1-5-1, Tenjin-cho, Kiryu Gunma 376-8515, Japan
fYear
2015
Firstpage
344
Lastpage
347
Abstract
In this paper, high-speed Signed-Digit (SD) architectures of binary-to-residue and residue-to-binary conversions for residue number system (RNS) with the moduli set (2n, 2n - 1, 2n + 1) are proposed. The complexity of the conversions and residue arithmetic operations has been greatly reduced by using compact forms for the multiplicative inverse and the fast residur SD addition algorithm. The relationships of the proposed binary-to-residue and residue-to-binary conversions using the residue SD numbers result in simpler hardware requirements for the converters. The primary advantage of our methods is that our conversions and arithmetic operations utilize the modulo m SD adders (MSDAs) only and the proposed basic circuits have high speed structures in a constant delay time.
Keywords
"Logic gates","Hardware","Adders","Signal processing algorithms","Delays","Time complexity"
Publisher
ieee
Conference_Titel
Electronics, Circuits, and Systems (ICECS), 2015 IEEE International Conference on
Type
conf
DOI
10.1109/ICECS.2015.7440319
Filename
7440319
Link To Document