DocumentCode :
3763856
Title :
Recent ASICs developments in 65nm CMOS technology for high energy physics experiments
Author :
Natale Demaria
Author_Institution :
INFN Sezione di Torino, Torino, Italy
fYear :
2015
Firstpage :
380
Lastpage :
383
Abstract :
The High Luminosity Large Hadron Collider (HL-LHC) will constitute a new frontier for the particle physics after the year 2024. The CERN experiments will undertake a major upgrade in order to stand this challenge: the use of innovative sensors and electronics will be have a main role on this. This paper describes the recent developments in 65nm CMOS technology for readout ASICS of future HEP experiments. These allow unprecedented performance in term of speed, low noise, low power consumption and highly granular tracking detectors.
Keywords :
"CMOS integrated circuits","CMOS technology","Large Hadron Collider","Detectors","Physics","Application specific integrated circuits"
Publisher :
ieee
Conference_Titel :
Electronics, Circuits, and Systems (ICECS), 2015 IEEE International Conference on
Type :
conf
DOI :
10.1109/ICECS.2015.7440328
Filename :
7440328
Link To Document :
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