Impact of asymmetric gate stack on a junctionless CSG MOSFET for enhanced hot carrier reliability

This paper reports the impact of asymmetric gate stack architecture (AGSA) on a junctionless cylindrical surrounding gate (JL-CSG) MOSFET to improve the hot carrier reliability and electrostatic control. The novel structure is based upon asymmetric gate stack architecture by combining high-k gate dielectric at source side and vacuum gate dielectric at drain side which significantly reduces electric field, electron temperature and drain induced gate leakage. A comparative performance evaluation of short channel effects (SCEs) between a new device structure, AGSA JL-CSG MOSFET, and a conventional JL-CSG MOSFET has been carried out. The figure of merit (FOM) metrics such as electric field, surface potential, electron temperature, drain current (Ids) and transconductance (gm) have been investigated. The vacuum dielectric enhances immunity against hot carrier induced damage and high-k dielectric improves the analog/RF characteristics. The simulations have been performed using the ATLAS 3-D device simulator.