Design of a new Ternary SRAM cell (ZV-SRAM) based on innovative level shift based Ternary Inverter (ZV-inverter)

Ternary logic can be more useful and efficient in the field of storing information. Ternary logic will give higher code capacity and can address large number of locations for fewer bits. Hence, Ternary logic can be used to store a greater amount of information i.e. possible to achieve greater density of memory and decrease the pin count of integrated circuits. In this work, we propose to design a Ternary-SRAM cell which can store three different voltage levels efficiently without any data loss. In this work, it is also shown that, designing SRAM cell with traditional current dependent Ternary-Inverter is very difficult and impractical, as any current mismatch in inverters will corrupt the stored data. Therefore, in this work, we also propose a very new kind of voltage controlled Ternary-Inverter called as `Z-V Inverter´ which works on the principal of level shifting.