DocumentCode :
3765286
Title :
Short word length NULL convention logic FIR filter for low power applications
Author :
Renuka Sovani;Kashfia Haque;Paul Beckett
Author_Institution :
School of Electrical and Computer Engineering, RMIT University, Melbourne Australia
fYear :
2015
Firstpage :
102
Lastpage :
105
Abstract :
This paper presents an asynchronous single bit Delta Sigma FIR-like filter designed using NULL Convention Logic (NCL) that can be operated near the threshold region of its transistor components aimed at low power, low bandwidth applications such as ECG signal acquisition. The proposed design is compared against an equivalent synchronous single bit filter designed using conventional Boolean logic in terms of power, performance and area. The circuit exhibits correct operation even within the variability-prone near/sub-threshold region. As a result it is able to operate with greatly reduced supply voltages to achieve a low value of power-delay product. The example implementation using 130nm technology achieves a power reduction of 5X, compared to a traditional synchronous filter design with similar performance targets.
Keywords :
"Finite impulse response filters","Logic gates","Delays","Libraries","Transistors","Clocks","Hardware design languages"
Publisher :
ieee
Conference_Titel :
Electrical and Computer Engineering (WIECON-ECE), 2015 IEEE International WIE Conference on
Type :
conf
DOI :
10.1109/WIECON-ECE.2015.7444009
Filename :
7444009
Link To Document :
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