Design of FPGA-based digital sphygmomanometer

Hypertension is one of the most common diseases nowadays, and it is important to monitor the blood pressure in a patient´s daily life. The goal of this work is to design and develop an intelligent and easy-to-use digital sphygmomanometer for convenient personal use. Due to the high speed offered by Field-Programmable Gate Array (FPGA) and because FPGA overcomes the disadvantages of a single-chip microcomputer´s lack of on-chip resource and high-end Advanced RISC Machine (ARM) processors´ higher costs, FPGA is chosen as the processor in this work. We first use a pressure sensor to capture the blood pressure signal, out of which a pulse wave is electronically extracted through a band-pass filter to determine the systolic and diastolic points. Both the original pressure signal and the pulse wave signal are digitized and fed into the FPGA which implements an oscillometric method to process these two digital signals to get the systolic pressure and the diastolic pressure. The readings are then shown on a display module. Experimental studies demonstrate that the digital sphygmomanometer is fast and accurate in measuring blood pressure.