Fault Secure Encoder and Decoder Designs for Matrix Codes

Transient multiple cell upsets (MCUs) are becoming major issues in the reliability of memories exposed to radiation environment. Error correction codes (ECCs) are commonly used to protect memories against MCUs. Among ECCs, matrix codes have obvious advantages due to the simplicity of the encoding and decoding algorithm that enables low overheads. However, an important issue is that when ECCs are used, the encoder and decoder circuits also suffer from errors which affect the reliability of the memory systems. In this paper, low overhead fault secure encoder and decoder designs for matrix codes are proposed to protect encoder and decoder. By using the properties of the parity check matrix of matrix codes, the proposed designs efficiently implement a parity prediction scheme with low overheads. They can detect all errors deriving from a single node in encoder and decoder circuits. A fault secure memory system is established and evaluated, and the obtained results show that the proposed scheme has lower area and power overheads.