A Fast and Simple Block-Based Approach for Common Path Pessimism Removal in Static Timing Analysis

The "early/late split" in delay modeling is an effective approach to handle the variability in deep submicron integrated circuits. However, static timing analysis with early/late split is often too conservative due to the common path pessimism, where the common path pessimism removal (CPPR) technique is helpful to eliminate the unnecessary pessimism. In this paper, we propose a fast and simple CPPR algorithm with sub-quadratic time complexity.