• DocumentCode
    3767855
  • Title

    Investigating short channel effects and performance parameters of double gate junctionless transistor at various technology nodes

  • Author

    Vishal Narula;Charu Narula;Jatinder Singh

  • Author_Institution
    University Institute of Engineering and Technology, Panjab University, Chandigarh, India
  • fYear
    2015
  • Firstpage
    1
  • Lastpage
    5
  • Abstract
    The short channel effects and performance parameters of double gate junctionless transistor are analyzed at different channel lengths. In this paper various graphs like Drain Induced Barrier Lowering, Subthreshold Swing, On current, Off current, on/off ratio and Threshold voltage variations at different channel lengths are discussed. Junctionless transistor is a new technology device with no junctions and with the easy fabrication when scaling is done. Reasons for variations of parameters at different channel lengths (20nm, 25nm and 30nm) are discussed. Double Gate Junctionless transistor provides better control over the carriers flowing in the device, as front gate and back gate controls the flow of current. We need a heavy doping to analyse the parameters as there is only one type of doping which is done in junctionless transistor. Doping is kept at 1.5E+19cm-3. Doping is responsible for the current to flow in the device.
  • Keywords
    "Logic gates","Transistors","Threshold voltage","Performance evaluation","Doping","Junctions","Mathematical model"
  • Publisher
    ieee
  • Conference_Titel
    Recent Advances in Engineering & Computational Sciences (RAECS), 2015 2nd International Conference on
  • Type

    conf

  • DOI
    10.1109/RAECS.2015.7453429
  • Filename
    7453429