• DocumentCode
    3767886
  • Title

    The design and implementation of TCP hardwiring and offloading engine

  • Author

    Shu Yan Jiang;Zhi Lu;Yuan Yuan Mao;Gang Luo;Qi Li

  • Author_Institution
    School of Automation Engineering, University of Electronic Science and Technology of China, Chengdu 611731, China
  • fYear
    2015
  • Firstpage
    52
  • Lastpage
    53
  • Abstract
    This paper described the design and implementation procedure of Transmission Control Protocol (TCP) hardwiring and TCP offloading engine based on Field Programmable Gate Array (FPGA). The design consists of several modules, and the connection among modules is implemented by buses. The result shows that some functions are realized in this design. The most contribution of this paper is that the design founds the base of Transmission Control Protocol/Internet Protocol (TCP/IP) hardwiring and offloading engine.
  • Keywords
    "Engines","Protocols","TCPIP","Field programmable gate arrays","Software","Central Processing Unit","Internet"
  • Publisher
    ieee
  • Conference_Titel
    Applied Superconductivity and Electromagnetic Devices (ASEMD), 2015 IEEE International Conference on
  • Print_ISBN
    978-1-4673-8106-2
  • Type

    conf

  • DOI
    10.1109/ASEMD.2015.7453462
  • Filename
    7453462
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=3767886